The present invention relates generally to the fabrication of semiconductor devices, and more specifically to inducing channel stress in field effect transistors (FETs).
FETs may include a semiconductor substrate containing a source region and a drain region spaced apart by a channel region. A FET with n-type source region and drain region is referred to as an nFET. A FET with p-type source region and drain region is referred to as a pFET. The channel region may be undoped or have opposite doping than the source region and the drain region. A gate electrode may be formed above the channel region. By applying voltage to the gate electrode, the conductivity of the channel region may increase and allow current to flow from the source region to the drain region. The amount by which the channel conductivity increases depends in part upon carrier mobility in the channel region (i.e., how quickly a electron or hole can move through the channel region).
As metal-oxide-semiconductor field-effect transistor (MOSFET) structures continue to become smaller in size, carrier mobility in the channel region may also be reduced due to increased dopant concentration in the MOSFET. One method of increasing carrier mobility in the channel region is to apply tensile strain or compressive strain to the channel region. However, known methods of applying strain to the channel region often require the addition of processes into standard process flows, potentially increasing the cost of producing transistors while also decreasing yield. It may therefore be advantageous to employ techniques that increase carrier mobility in the channel region of a transistor by generating stress or strain in the channel and therefore increasing device performance without requiring a substantial number of additional processes.